***** ＩＮＤＥＸ ***** #1 ８ビットデータ移動命令 LD #2 １６ビットデータ移動命令 LD, PUSH, POP #3 交換、ブロック転送、検索命令 EX, LDI, LDD, CPI, CPD #4 ８ビット算術・論理演算命令 ADD, ADC, SUB, SBC, AND, OR, XOR, CP, INC, DEC #5 汎用算術演算、ＣＰＵ制御命令 DAA, CPL, NEG, CCF, SCF, NOP, HALT, DI, EI, IM #6 １６ビット算術演算命令 ADD, ADC, SBC, INC, DEC #7 循環、桁移動命令 RL, RLC, RR, RRC, SLA, SRA RLD, RRD #8 ビット設定、判定命令 BIT, SET, RES #9 飛び越し（ジャンプ）命令 JP, JR, DJNZ #10 サブルーチンコール、リターン命令 CALL, RET, RETI, RETN, RST #11 入出力命令 IN, INI, INIR, IND, INDR OUT, OUTI, OTIR, OUTD, OTDR +----- FLAG NOTATION -----------------------------------------------+ | * flag not affected | | 0 flag reset | | 1 flag set | | X flag is unknown | | ? flag is affected according to the result of the operation | | A Z flag is 1 if A=(HL), otherwise Z=0 | | B P/V flag is 0 if the result of BC-1=0, otherwise P/V=1 | | C if the result of BC-1=0, the Z flag is set, otherwise is reset | | | | FLAG | | bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 | | SIGN ZERO ---- H/C ---- P/V SUB CARRY | +---------------------------------------------------------------------+ #1 ８ビットデータ移動命令 P / MNEMONIC OPERATION C Z V S N H M T OP-CODE COMMENTS ------------------------------------------------------------------------------- -LD- LD r,r' r ← r' * * * * * * 1 4 XX r,r'= LD r,n r ← n * * * * * * 2 7 XX A,B,C,D,E,H,L LD r,(HL) r ← (HL) * * * * * * 2 7 XX LD r,(IX+d) r ← (IX+d) * * * * * * 5 19 DD XX XX LD r,(IY+d) r ← (IY+d) * * * * * * 5 19 FD XX XX LD (HL),r (HL) ← r * * * * * * 2 7 7X LD (IX+d),r (IX+d) ← r * * * * * * 5 19 DD 7X XX LD (IY+d),r (IY+d) ← r * * * * * * 5 19 FD 7X XX LD (HL),n (HL) ← n * * * * * * 3 10 36 XX LD (IX+d),n (IX+d) ← n * * * * * * 5 19 DD 36 XX XX LD (IY+d),n (IY+d) ← n * * * * * * 5 19 FD 36 XX XX LD A,(BC) A ← (BC) * * * * * * 2 7 0A LD A,(DE) A ← (DE) * * * * * * 2 7 1A LD A,(nn) A ← (nn) * * * * * * 4 13 3A XX XX LD (BC),A (BC) ← A * * * * * * 2 7 02 LD (DE),A (DE) ← A * * * * * * 2 7 12 LD (nn),A (nn) ← A * * * * * * 4 13 32 XX XX LD A,I A ← I * ? I ? 0 0 2 9 ED 57 LD A,R A ← R * ? I ? 0 0 2 9 ED 5F LD I,A I ← A * * * * * * 2 9 ED 47 LD R,A R ← A * * * * * * 2 9 ED 4F ------------------------------------------------------------------------------- #2 １６ビットデータ移動命令 P / MNEMONIC OPERATION C Z V S N H M T OP-CODE COMMENTS ------------------------------------------------------------------------------- -LD- LD dd,nn dd ← nn * * * * * * 3 10 X1 XX XX dd= LD IX,nn IX ← nn * * * * * * 4 14 DD 21 XX XX BC,DE,HL,SP LD IY,nn IY ← nn * * * * * * 4 14 FD 21 XX XX LD HL,(nn) H ← (nn+1) * * * * * * 5 16 2A XX XX L ← nn LD dd,(nn) ddH ← (nn+1) * * * * * * 6 20 ED XB XX XX ddL ← (nn) LD IX,(nn) IXH ← (nn+1) * * * * * * 6 20 DD 2A XX XX IXL ← (nn) LD IY,(nn) IYH ← (nn+1) * * * * * * 6 20 FD 2A XX XX IYL ← (nn) LD (nn),HL (nn+1) ← H * * * * * * 5 16 22 XX XX (nn) ← L LD (nn),dd (nn+1) ← ddH * * * * * * 6 16 ED X3 XX XX (nn) ← ddL LD (nn),IX (nn+1) ← IXH * * * * * * 6 16 DD 22 XX XX (nn) ← IXL LD (nn),IY (nn+1) ← IYH * * * * * * 6 16 FD 22 XX XX (nn) ← IYL LD SP,HL SP ← HL * * * * * * 1 6 F9 LD SP,IX SP ← IX * * * * * * 2 10 DD F9 LD SP,IY SP ← IY * * * * * * 2 10 FD F9 -PUSH- PUSH qq (SP-2) ← qqL * * * * * * 3 11 X5 qq= (SP-1) ← qqH BC,DE,HL,AF PUSH IX (SP-2) ← IXL * * * * * * 4 15 DD E5 (SP-1) ← IXH PUSH IY (SP-2) ← IYL * * * * * * 4 15 FD E5 (SP-1) ← IYH -POP- POP qq qqH ← (SP+1) * * * * * * 3 10 X1 qqL ← (SP) POP IX IXH ← (SP+1) * * * * * * 4 14 DD E1 IXL ← (SP) POP IY IYH ← (SP+1) * * * * * * 4 14 FD E1 IYL ← (SP) ------------------------------------------------------------------------------- #3 交換、ブロック転送、検索命令 P / MNEMONIC OPERATION C Z V S N H M T OP-CODE COMMENTS ------------------------------------------------------------------------------- -EX- EX DE,HL DE ←→ HL * * * * * * 1 4 EB Register bank EX AF,AF' AF ←→ AF' * * * * * * 1 4 08 and auxiliary EXX BC ←→ BC' * * * * * * 1 4 D9 register bank DE ←→ DE' exchange HL ←→ HL' EX (SP),HL H ←→ (SP+1) * * * * * * 5 19 E3 L ←→ (SP) EX (SP),IX IXH ←→ (SP+1) * * * * * * 6 23 DD E3 IXL ←→ (SP) EX (SP),IY IYH ←→ (SP+1) * * * * * * 6 23 FD E3 IYL ←→ (SP) -LDI- LDI (DE) ← (HL) * * A * 0 0 4 16 ED A0 DE ← DE+1 HL ← HL+1 BC ← BC-1 LDIR (DE) ← (HL) * * 0 * 0 0 5 21 ED B0 BC<>0 DE ← DE+1 4 16 BC= 0 HL ← HL+1 BC ← BC-1 repeat to BC=0 -LDD- LDD (DE) ← (HL) * * A * 0 0 4 16 ED A8 DE ← DE-1 HL ← HL-1 BC ← BC-1 LDDR (DE) ← (HL) * * 0 * 0 0 5 21 ED B8 BC<>0 DE ← DE-1 4 16 BC= 0 HL ← HL-1 BC ← BC-1 repeat to BC=0 -CPI- CPI A - (HL) * B A ? 1 ? 4 16 ED A1 HL ← HL+1 BC ← BC-1 CPIR A - (HL) * B A ? 1 ? 5 21 ED B1 BC<>0 & A<>(HL) HL ← HL+1 4 16 BC=C or A=(HL) BC ← BC-1 repeat to A=(HL) or BC=0 -CPD- CPD A - (HL) * B A ? 1 ? 4 16 ED A9 HL ← HL-1 BC ← BC-1 CPDR A - (HL) * B A ? 1 ? 5 21 ED B9 BC<>0 & A<>(HL) HL ← HL-1 4 16 BC=C or A=(HL) BC ← BC-1 repeat to A=(HL) or BC=0 ------------------------------------------------------------------------------- #4 ８ビット算術・論理演算命令 P / MNEMONIC OPERATION C Z V S N H M T OP-CODE COMMENTS ------------------------------------------------------------------------------- -ADD- ADD A,r A ← A+r ? ? V ? 0 ? 1 4 8A r= ADD A,n A ← A+n ? ? V ? 0 ? 2 7 C6 XX A,B,C,D,E,H,L ADD A,(HL) A ← A+(HL) ? ? V ? 0 ? 2 7 86 ADD A,(IX+d) A ← A+(IX+d) ? ? V ? 0 ? 5 19 DD 86 XX ADD A,(IY+d) A ← A+(IY+d) ? ? V ? 0 ? 5 19 FD 86 XX -ADC- ADC A,s A ← A+s+CY ? ? V ? 0 ? s=r,n,(HL), -SUB- SUB s A ← A-s ? ? V ? 1 ? (IX+d),(IY+d) -SBC- SBC A,s A ← A-s-CY ? ? V ? 1 ? -AND- AND s A ← A and s 0 ? P ? 0 1 -OR- OR s A ← A or s 0 ? P ? 0 0 -XOR- XOR s A ← A xor s 0 ? P ? 0 0 -CP- CP s A-s ? ? V ? 1 ? -INC- INC r r ← r+1 * ? V ? 0 ? 1 4 XX INC (HL) (HL) ← (HL)+1 * ? V ? 0 ? 3 11 34 INC (IX+d) (IX+d) ← * ? V ? 0 ? 6 23 DD 34 XX (IX+d)+1 INC (IY+d) (IY+d) ← * ? V ? 0 ? 6 23 FD 34 XX (IY+d)+1 -DEC- DEC d d ← d-1 * ? V ? 1 ? d=r,(HL),(IX+d) (IY+d) ------------------------------------------------------------------------------- #5 汎用算術演算、ＣＰＵ制御命令 P / MNEMONIC OPERATION C Z V S N H M T OP-CODE COMMENTS ------------------------------------------------------------------------------- -DAA- DAA ADD and BCD ? ? P ? * ? 1 4 27 Decimal Adjust Accumulator -CPL- CPL A ← /A * * * * 1 1 1 4 2F ComPLement accumulator -NEG- NEG A ← 0-A ? ? V ? 1 ? 2 8 ED 44 NEGate acc. two's Compl. -CCF- CCF CY ← /CY ? * * * 0 X 1 4 3F Complement Carry Flag -SCF- SCF CY ← 1 1 * * * 0 0 1 4 37 Set Carry Flag -NOP- NOP NO OPERATION * * * * * * 1 4 00 No OPeration -HALT- HALT CPU HALT * * * * * * 1 4 76 -DI- DI IFF ← 0 * * * * * * 1 4 F3 -EI- EI IFF ← 1 * * * * * * 1 4 FB -IM- IM 0 INT MODE 0 * * * * * * 2 8 ED 46 Interrupt Mode IM 1 INT MODE 1 * * * * * * 2 8 ED 56 IM 2 INT MODE 2 * * * * * * 2 8 ED 5E ------------------------------------------------------------------------------- #6 １６ビット算術演算命令 P / MNEMONIC OPERATION C Z V S N H M T OP-CODE COMMENTS ------------------------------------------------------------------------------- -ADD- ADD HL,ss HL ← HL+ss ? * * * 0 X 3 11 X9 ss=BC,DE,HL,SP -ADC- ADC HL,ss HL ← HL+ss+CY ? ? V ? 0 X 4 15 ED 5A -SBC- SBC HL,ss HL ← HL-ss-CY ? ? V ? 1 X 4 15 ED X2 -ADD- ADD IX,pp IX ← IX+pp ? * * * 0 X 4 15 DD X9 pp=BC,DE,IX,SP ADD IY,rr IY ← IY+rr ? * * * 0 X 4 15 FD X9 rr=BC,DE,IY,SP -INC- INC ss ss ← ss+1 * * * * * * 1 6 X3 INC IX IX ← IX+1 * * * * * * 2 10 DD 23 INC IY IY ← IY+1 * * * * * * 2 10 FD 23 -DEC- DEC ss ss ← ss-1 * * * * * * 1 6 XB DEC IX IX ← IX-1 * * * * * * 2 10 DD 2B DEC IY IY ← IY-1 * * * * * * 2 10 FD 2B ------------------------------------------------------------------------------- #7 循環、桁移動命令 P / MNEMONIC OPERATION C Z V S N H M T OP-CODE COMMENTS ------------------------------------------------------------------------------- -RLC- RLCA CY ←┬ ACC←┐ ? * * * 0 0 1 4 Rotate Left └───┘ Circular Acc. -RL- RLA ┌ CY ← ACC←┐ ? * * * 0 0 1 4 Rotate Left └──────┘ Acc. -RRC- RRCA ┌→ACC ┬→ CY ? * * * 0 0 1 4 Rotate Right └───┘ Circular Acc. -RR- RRA ┌→ACC → CY ┐ ? * * * 0 0 1 4 Rotate Right └──────┘ Acc. -RLC- RLC r ┐ ? ? P ? 0 0 2 8 Rotate Left RLC (HL) │ CY ←┬ REG←┐ ? ? P ? 0 0 4 15 Circular reg. r RLC (IX+d) │ └───┘ ? ? P ? 0 0 6 23 r=A,B,C,D,E,H,L RLC (IY+d) ┘ ? ? P ? 0 0 6 23 -RL- RL s ┌ CY ← REG←┐ ? ? P ? 0 0 S=r,(HL),(IX+d) └──────┘ (IY+d) -RRC- RRC s ┌→REG ┬→ CY ? ? P ? 0 0 └───┘ -RR- RR s ┌→REG → CY ┐ ? ? P ? 0 0 └──────┘ -SLA- SLA s CY ← REG ← 0 ? ? P ? 0 0 -SRA- SRA s ┌ R E G → CY ? ? P ? 0 0 └┘ -SRL- SRL s 0 → REG → CY ? ? P ? 0 0 -RLD- ┌───→┐ RLD ACC (HL) * ? P ? 0 0 5 18 74 30 74 30 └←┘└←┘ -RRD- ┌←───┐ RRD ACC (HL) * ? P ? 0 0 5 18 74 30 74 30 └→┘└→┘ ------------------------------------------------------------------------------- #8 ビット設定、判定命令 P / MNEMONIC OPERATION C Z V S N H M T OP-CODE COMMENTS ------------------------------------------------------------------------------- -BIT- BIT b,r Z ← /rb * ? X X 0 1 2 8 CB XX r=register, BIT b,(HL) Z ← /(HL)b * ? X X 0 1 3 12 CB XX A,B,C,D,E,H,L BIT b,(IX+d) Z ← /(IX+d)b * ? X X 0 1 5 20 DD CB XX XX b=Bit tested, BIT b,(IY+d) Z ← /(IY+d)b * ? X X 0 1 5 20 FD CB XX XX 0,1,2,3,4,5,6,7 -SET- SET b,r rb ← 1 * * * * * * 2 8 CB XX SET b,(HL) (HL)b ← 1 * * * * * * 4 15 CB XX SET b,(IX+d) (IX+d)b ← 1 * * * * * * 6 23 DD CB XX XX SET b,(IY+d) (IY+d)b ← 1 * * * * * * 6 23 FD CB XX XX -RES- RES b,s sb ← 0 * * * * * * s=r,(HL),(IX+d) (IY+d) ------------------------------------------------------------------------------- #9 飛び越し（ジャンプ）命令 P / MNEMONIC OPERATION C Z V S N H M T OP-CODE COMMENTS ------------------------------------------------------------------------------- -JP- JP nn PC ← nn * * * * * * 3 10 C3 XX XX JP cc,nn If condition * * * * * * 3 10 XX XX XX cc=Condition is true, PC ← nn NZ; non zero otherwise continue Z; zero NC; non carry C; carry PO; parity odd PE; parity even P; positive M; negative -JR- JR e PC ← Pc+e * * * * * * 3 12 18 XX JR C,e If C=0 continue * * * * * * 2 7 38 XX If cond.not met If C=1 PC←PC+e 3 12 If cond. met JR NC,e If C=1 continue * * * * * * 2 7 30 XX If cond.not met If C=0 PC←PC+e 3 12 If cond. met JR Z,e If Z=0 continye * * * * * * 2 7 28 XX If cond.not met If Z=1 PC←PC+e 3 12 If cond. met JR NZ,e If Z=1 continye * * * * * * 2 7 20 XX If cond.not met If Z=0 PC←PC+e 3 12 If cond. met -JP- JP (HL) PC ← HL * * * * * * 1 4 E9 JP (IX) PC ← IX * * * * * * 2 8 DD E9 JP (IY) PC ← IY * * * * * * 2 8 FD E9 -DJNZ- DJNZ e B ← B-1 * * * * * * 2 8 10 XX If B=0 If B=0 continue 3 13 If B<>0 If B<>0 PC ← PC+e ------------------------------------------------------------------------------- #10 サブルーチンコール･リターン命令 P / MNEMONIC OPERATION C Z V S N H M T OP-CODE COMMENTS ------------------------------------------------------------------------------- -CALL- CALL nn (SP-1) ← PCH * * * * * * 5 17 CD XX XX (SP-2) ← PCL PC ← nn CALL cc,nn If condition cc * * * * * * 3 10 XX XX XX If cc ic false is false continue, 5 17 If cc is true otherwise same as CALL nn -RET- RET PCL ← (SP) * * * * * * 3 10 C9 PCH ← (SP+1) RET cc If condition cc * * * * * * 1 5 XX If cc ic false is false continue, 3 11 If cc is true otherwise same as RET RETI Return from * * * * * * 4 14 ED 4D interrupt RETN Return from * * * * * * 4 14 ED 45 non maskable interrupt -RST- RST p (SP-1) ← PCH * * * * * * 3 11 XX p=00H,08H,10H (SP-2) ← PCL 18H,20H,28H PCH ← 0 30H,38H PCL ← p ------------------------------------------------------------------------------- #11 入出力命令 P / MNEMONIC OPERATION C Z V S N H M T OP-CODE COMMENTS ------------------------------------------------------------------------------- -IN- IN A,(n) A ← (n) * * * * * * 3 11 DB XX n to A0-A7 A to A8-A15 IN r,(C) r ← (C) * ? P ? 0 0 3 12 ED XX C to A0-A7 If r=110 only the flags will be affected B to A8-A15 INI (HL) ← (C) X C X X 1 X 4 16 ED A2 C to A0-A7 B ← B-1 B to A8-A15 HL ← HL+1 INIR (HL) ← (C) X 1 X X 1 X 5 21 ED B2 C to A0-A7 B ← B-1 (If B<>0) B to A8-A15 HL ← HL+1 4 16 Repeat until B=0 (If B=0) IND (HL) ← (C) X C X X 1 X 4 16 ED AA C to A0-A7 B ← B-1 B to A8-A15 HL ← HL-1 INDR (HL) ← (C) X 1 X X 1 X 5 21 ED BA C to A0-A7 B ← B-1 (If B<>0) B to A8-A15 HL ← HL-1 4 16 Repeat until B=0 (IF B=0) -OUT- OUT (n),A (n) ← A * * * * * * 3 11 D3 XX n to A0-A7 A to A8-A15 OUT (C),r (C) ← r * ? P ? 0 0 3 12 ED XX C to A0-A7 If r=110 only the flags will be affected B to A8-A15 OUTI (C) ← (HL) X C X X 1 X 4 16 ED A3 C to A0-A7 B ← B-1 B to A8-A15 HL ← HL+1 OTIR (C) ← (HL) X 1 X X 1 X 5 21 ED B3 C to A0-A7 B ← B-1 (If B<>0) B to A8-A15 HL ← HL+1 4 16 Repeat until B=0 (If B=0) OUTD (C) ← (HL) X C X X 1 X 4 16 ED AB C to A0-A7 B ← B-1 B to A8-A15 HL ← HL-1 OTDR (C) ← (HL) X 1 X X 1 X 5 21 ED BB C to A0-A7 B ← B-1 (If B<>0) B to A8-A15 HL ← HL-1 4 16 Repeat until B=0 (IF B=0) -------------------------------------------------------------------------------